Average Salary for Skill: Verilog Vhdl

Skill: Verilog Vhdl Median Salary by Job
Job
National Salary Data 
C$0C$50KC$100KC$150K
Electrical EngineerC$101,000  
   
Software EngineerC$87,429  
Hardware Design EngineerC$72,414  
Design Verification EngineerC$62,300  
Country: Canada | Currency: CAD | Updated: 19 Aug 2017 | Individuals Reporting: 13

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