The average salary for a Mid-Career ASIC Design Engineer in Bangalore, Karnataka is Rs 1,614,683 per year. A skill in Verilog Vhdl is associated with high pay for this job.

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United States (change)

ASIC Design Engineer Job Listings

Key Stats for ASIC Design Engineer

5-9 years
89%
10-19 years
11%
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Location:
Years in Fields/Career:
United States (change)

Skills That Affect ASIC Design Engineer Salaries

Verilog Vhdl
▲4%

National Average
Rs 1,800,000

Engineering Design, Semiconductor
▼3%

verilog
▼5%

Common Health Benefits

medical benefits
Medical: 100%
dental benefits
Dental: 17%
vision benefits
Vision: 33%
no benefits
None:
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