Design Verification Engineer at Intel Corporation in Bangalore Salary

A Design Verification Engineer at Intel Corporation in Bangalore, Karnataka earns an average salary of Rs 1,006,188 per year. A skill in C++ is associated with high pay for this job.

Rs 195,704 - Rs 1,589,269
(Median)
Rs 200K
Rs 1M
Rs 2M
MEDIAN: Rs 1,006,188
10%
50%
90%

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Local Salary Data (?
XAll compensation data shown are gross 10th to 90th percentile ranges. Take the PayScale Survey to find out how location influences pay for this job.
)
Rs 0Rs 600KRs 1.2MRs 1.8M
Salary
Rs 195,704 - Rs 1,589,269  
   
Bonus
Rs 43,278 - Rs 193,916  
Profit Sharing
Rs 60,000  
Total Pay (?
XTotal Pay combines base annual salary or hourly wage, bonuses, profit sharing, tips, commissions, overtime pay and other forms of cash earnings, as applicable for this job. It does not include equity (stock) compensation, cash value of retirement benefits, or the value of other non-cash benefits (e.g. healthcare).
)
Rs 302,012 - Rs 1,787,928  
Country: India | Currency: INR | Updated: 19 Sep 2015 | Individuals Reporting: 20
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Skills That Affect Design Verification Engineer Salaries

C++
up arrow 15%

Perl
up arrow 7%

National Average
Rs 1,098,000

verilog
up arrow 5%

Job Satisfaction

Highly satisfied
Rated 4 out of 5
based on 5 votes.

Gender

Female
12 %
Male
88 %

Years of Experience

Less than 1 year
5%
1-4 years
45%
5-9 years
40%
10-19 years
10%

Common Health Benefits

medical benefits
Medical: 83%
dental benefits
Dental: 11%
medical benefits
Vision: 11%
dental benefits
None: 17%
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