Entry-Level Design Verification Engineer in Bangalore Salary (India)

The average pay for an Entry-Level Design Verification Engineer in Bangalore, Karnataka is Rs 802,471 per year. A skill in C++ Programming Language is associated with high pay for this job.

Rs 185,874 - Rs 1,490,475
Rs 190K
Rs 800K
Rs 2M
MEDIAN: Rs 802,471
10%
50%
90%

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Local Salary Data (?
XAll compensation data shown are gross 10th to 90th percentile ranges. Take the PayScale Survey to find out how location influences pay for this job.
)
Rs 0Rs 600KRs 1MRs 1M
Salary
Rs 185,874 - Rs 1,490,475  
   
Bonus
Rs 9,863 - Rs 120,401  
Profit Sharing
Rs -21.75 - Rs 290,874  
Total Pay (?
XTotal Pay combines base annual salary or hourly wage, bonuses, profit sharing, tips, commissions, overtime pay and other forms of cash earnings, as applicable for this job. It does not include equity (stock) compensation, cash value of retirement benefits, or the value of other non-cash benefits (e.g. healthcare).
)
Rs 193,451 - Rs 1,578,999  
Country: India | Currency: INR | Updated: 24 Mar 2017 | Individuals Reporting: 90

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Key Stats for Design Verification Engineer

Gender

Female
3 %
Male
97 %
Less than 1 year
9%
1-4 years
78%
5-9 years
13%
Location:
Years in Fields/Career:
United States (change)

Skills That Affect Design Verification Engineer Salaries

C++ Programming Language
▲16%

Perl
▲9%

Verilog Vhdl
▲9%

National Average
Rs 818,000

verilog
▼1%

System Verilog
▼21%

uvm
▼29%

C++
▼39%

Gender

Female
3 %
Male
97 %

Common Health Benefits

medical benefits
Medical: 69%
dental benefits
Dental: 2%
vision benefits
Vision: 6%
no benefits
None: 31%