A Senior ASIC Design Engineer in Bangalore, Karnataka earns an average salary of Rs 1,736,495 per year. Experience has a moderate effect on income for this job. People in this job generally don't have more than 20 years' experience. A skill in Verilog Vhdl is associated with high pay for this job.

Rs 965,758 - Rs 2,947,609
Rs 970K
Rs 2M
Rs 3M
MEDIAN: Rs 1,736,495
10%
50%
90%

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Local Salary Data (?
XAll compensation data shown are gross 10th to 90th percentile ranges. Take the PayScale Survey to find out how location influences pay for this job.
)
Rs 0Rs 1MRs 2MRs 3M
Salary
Rs 965,758 - Rs 2,947,609  
   
Bonus
Rs 0.00 - Rs 300,000  
Profit Sharing
Rs 127,500  
Total Pay (?
XTotal Pay combines base annual salary or hourly wage, bonuses, profit sharing, tips, commissions, overtime pay and other forms of cash earnings, as applicable for this job. It does not include equity (stock) compensation, cash value of retirement benefits, or the value of other non-cash benefits (e.g. healthcare).
)
Rs 1,047,031 - Rs 2,947,609  
Country: India | Currency: INR | Updated: 4 May 2017 | Individuals Reporting: 26

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Key Stats for Senior ASIC Design Engineer

Gender

Female
15 %
Male
85 %
1-4 years
12%
5-9 years
69%
10-19 years
19%
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Location:
Years in Fields/Career:
United States (change)

Experience Affects Senior ASIC Design Engineer Salaries

▲22%

▲4%

National Average
Rs 1,879,000

Entry-Level
▼36%

Skills That Affect Senior ASIC Design Engineer Salaries

▲12%

National Average
Rs 1,879,000


▼28%

Gender

Female
15 %
Male
85 %

Years of Experience

1-4 years
12%
5-9 years
69%
10-19 years
19%

Common Health Benefits

medical benefits
Medical: 100%
dental benefits
Dental: 25%
vision benefits
Vision: 20%
no benefits
None:
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