Average Salary for Skill: Verilog Vhdl

Skill: Verilog Vhdl Median Salary by Job
Job
National Salary Data 
Rs 0Rs 900KRs 1.8MRs 2.7M
Design Verification Engineer
47 salaries
Rs 905,384  
   
Design Engineer
33 salaries
Rs 696,343  
ASIC Design Engineer
15 salaries
Rs 776,870  
Senior ASIC Design Engineer
15 salaries
Rs 1,500,708  
Staff Engineer
3 salaries
Rs 1,850,000  
Senior ASIC Engineer
3 salaries
Rs 2,495,502  
Hardware Design Engineer
2 salaries
Rs 1,200,000  
Country: India | Currency: INR | Updated: 23 Sep 2016 | Individuals Reporting: 149
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