The average salary for a Mid-Career ASIC Design Engineer in Bangalore, Karnataka is Rs 1,614,683 per year. A skill in Verilog Vhdl is associated with high pay for this job.

Rs 789,061 - Rs 1,996,938
Rs 790K
Rs 2M
Rs 2M
MEDIAN: Rs 1,611,517
Rs 0Rs 2M
Salary Rs 789,061 - Rs 1,996,938
Bonus Rs 142,431
Profit Sharing Rs 190,000
Total Pay (?
XTotal Pay combines base annual salary or hourly wage, bonuses, profit sharing, tips, commissions, overtime pay and other forms of cash earnings, as applicable for this job. It does not include equity (stock) compensation, cash value of retirement benefits, or the value of other non-cash benefits (e.g. healthcare).
Rs 789,061 - Rs 2,199,673
  • Country: India
  • Currency: INR
  • Updated: 10 Jan 2018
  • Individuals Reporting: 17

Job Description for ASIC Design Engineer

An ASIC design engineer typically works within a team that is responsible for all aspects of design activities, including architecture definition, design specification, design flow development, logic design, and verification. ASIC is defined as “application-specific integrated circuit” and is an integrated circuit that is customized for a specific use, rather than for general use. The ASIC design engineer is typically responsible for designing and delivering large, complex ASIC designs, and they deliver efficient design methodology on industry-standard design tools.


ASIC Design Engineer Tasks

  • Define and coordinate corrective action changes.
  • Write documentation and test specifications.
  • Research, design, develop, and test computer or computer-related equipment.
  • Provide technical support to team members.

ASIC Design Engineer Job Listings

Key Stats for ASIC Design Engineer

5-9 years
10-19 years

Skills That Affect ASIC Design Engineer Salaries

Verilog Vhdl

National Average
Rs 1,790,000

Engineering Design, Semiconductor


Common Health Benefits

medical benefits
Medical: 100%
dental benefits
Dental: 17%
vision benefits
Vision: 25%
no benefits