Senior ASIC Design Engineer with verilog Skills Salary (India)

The average salary for a Senior ASIC Design Engineer with verilog skills is Rs 1,272,888 per year. Most people with this job move on to other positions after 20 years in this career. Experience has a moderate effect on pay for this job.

Senior ASIC Design Engineer Job Listings

Pay Difference by Location

National Average: Rs 1,345,776

Larger city markers indicate a job is popular in that location.

Key Stats for Senior ASIC Design Engineer

1-4 years
22%
5-9 years
78%

Experience Affects Senior ASIC Design Engineer Salaries

Experienced
▲75%

Mid-Career
▲49%

National Average
Rs 1,346,000

Entry-Level
▼7%

Years of Experience

1-4 years
22%
5-9 years
78%

Common Health Benefits

medical benefits
Medical: 100%
dental benefits
Dental: 17%
vision benefits
Vision: 17%
no benefits
None: