Average Salary for Skill: Verilog Vhdl

Verilog Vhdl Median Salary by Job

MinMax

Rs 896,201
Rs 304KRs 2.4M

Design Engineer
61 profiles
Rs 618,252
Rs 203KRs 1.5M

Rs 665,000
Rs 260KRs 1.8M

India (change)

Rs 1,250,795
Rs 536KRs 2.8M

Staff Engineer
9 profiles
Rs 2,502,523
Rs 1.8MRs 3.4M

Rs 2,250,000
Rs 1.6MRs 2.6M

Rs 1,000,000
Rs 425KRs 1.4M

See all employers for Verilog Vhdl »
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  • Country: India
  • Currency: INR
  • Updated: 17 Jan 2018
  • Individuals Reporting: 282
  • View Table

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